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application note a 500w high power factor with the l4981a continuous mode ic introduction reduction of line current harmonic distortion and improvement of power factor is of great concern to many designers of off-line switched mode power supplies. this concern has been moti- vated by present and impending regulatory re- quirements regarding line current harmonics. the reasons for improving power factor and reducing line current harmonic distortion are well known and understood. active power factor correction using the boost topology and operating in the continuous inductor current control mode is an excellent method to comply with these require- ments and is well accepted in the industry. this paper will present a practical power factor corrected design for a 500 watt output and uni- versal mains input application. the detailed deri- vations of all power, ic biasing and control com- ponent values and types will be shown. the evaluation results from an actual working de- moboard will be presented as well as several relevant oscillograms. design specifications the design specifications given below are real- ized by the implementation of a functional de- moboard. the design target specifications are as follows: - universal mains input ac voltage v irms = 88vac to 264vac, 60/50hz - dc regulated output voltage v out = 400vdc - full load output ripple voltage d v ripple = 8v - rated output power p out = 500w - maximum output overvoltage v omax = 450v - switching frequency f sw = 80khz - maximum inductor current ripple d i l = 23% - input power factor pf > 0.99 - input line current total harmonic distortion <5% to meet these specifications, the selection of component values and material types is very im- portant. the next sections will describe the com- ponent selection criteria along with some critical derivations. for detailed explanations on the con- troller operation and pin description, refer to ap- plication note an628 designing a high power factor switching preregulator with the l4981 continuous mode [1] and the corresponding datasheet l4981a/b power factor corrector [2]. power components selection the power component values and types are de- rived and selected in the next section. please re- fer to figure 2, 500 watt demoboard schematic. input diode bridge the input diode bridge, d1, can be a standard slow-recovery type. the selection criteria include the maximum peak reverse breakdown voltage, maximum forward average current, maximum surge current and thermal considerations. maximum peak reverse voltage: v prv =v irmsmax ? `` 2 ? 1.2 (safety margin) = = 264v ? ` ` 2 ? 1.2 = 448v therefore use a 600v rated diode. maximum forward average current: i rmsmax = p out v rms min ? n = 500 88 ? 0.9 = 6.31a i fave = i rmsmax ? ` ` 2 p = 6.31 ? `` 2 p = 2.84a the thermal considerations require the i fave rating to be significantly higher than the value calcu- lated. the part chosen has a i fave of 25a. addi- AN827/1297 the widespread use of passive ac/dc off-line converters causes low power factor and high line current harmonic distortion. to reduce these phenomena and to comply with relevant regulatory agency requirements , designers are employing active power factor correction in their off-line smps applications. this paper describes a practical, low cost and easy to implement 500w power factor corrected application that employs the l4981a continuous mode pfc ic. 1/16
tionally, a small heatsink is required to keep the case temperature within specification. maximum surge current: there is a significant inrush current at start-up due to the large value bulk capacitor, c6, at the output. there is minimal impedance from the mains to this capacitor, thus at the peak of the in- put voltage waveform a large inrush current ex- ists. this inrush current can be significantly re- duced by some means of current limiting such as an ntc or triac/resistor combination. the input bridge diode's maximum surge current rating must not be exceeded. this demoboard has a low cost and simple ntc for current inrush limit- ing. the efficiency can be improved by using the triac/resistor scheme, however the cost and com- plexity increases. input fuse the input fuse, f1, must open during severe cur- rent overloads without tripping during the tran- sient inrush current condition or during normal op- eration. the fuse must have a current rating above the maximum continuous current (6.3arms) that occurs at the low line voltage (88v). the fuse chosen for this demoboard has a continuous current rating of 10a/250vac. input filter capacitor the input filter capacitor, c3, is placed across the diode bridge output. this capacitor must smooth the high frequency ripple and must sustain the maximum instantaneous input voltage. in a typical application an emi filter will be placed between the mains and the pfc circuit. this demoboard does not have the emi filter except for this input capacitor. however, the evaluation results listed in table 1 were made with an emi filter placed between the mains input and the pfc circuit. the design of the emi filter is not described here. the value of the input filter capacitor can be cal- culated as follows: cin > kr i rms 2 ? p ? f sw ? r ? v rms min cin > 0.25 ? 6.31 2 ? p ? 80k ? 0.06 ? 88 = 0.59 m f. where: kr is the current ripple coefficient r = 0.02 to 0.08 the maximum value of this capacitor is limited to avoid line current distortion. the value chosen for this demoboard is 0.68 m f. output bulk capacitor the choice of the output bulk capacitor, c6, de- pends on the electrical parameters that affect the filter performance and also on the subsequent ap- plication. capacitance value: the value shall be chosen to limit the output volt- age ripple according to the following formula: assume low esr and d v ripple = 8v cout = p out 2 p ? 2f ? d v o ? v o = p out 2 p ? 120 ? 8 ? 400 = 207 m f the value chosen is 330uf to ensure that the maximum specified voltage ripple is not ex- ceeded. although the esr does not normally affect the voltage ripple, it has to be considered for the power losses due to the line and switching fre- quency ripple currents. it is important to verify that the low and high frequency ripple currents do not exceed the manufacturer's specified ratings at the operating case temperature. capacitors may be connected in parallel to decrease the equiva- lent esr and to increase the ripple current han- dling capability. if a specific hold-up time is required, that is the capacitor has to deliver the supply voltage for a specified time and for a specified dropout voltage, then the capacitor value will be determined by the following equation: cout = 2 ? p out ? t hold v o min 2 - v op min 2 where: p out is the maximum output power v omin is the minimum output voltage at max. load v opmin is the minimum operating voltage before opower failo detection t hold is the required hold-up time voltage rating: the capacitor output voltage rating should not be exceeded under worst case conditions. the mini- mum voltage rating is calculated as follows: v cap >v out + d v ripple +v margin = 400 + 8 + 40 = 448v where: v out is the nominal regulated dc output voltage d v ripple is the ac voltage superimposed on the regulated dc output voltage d v margin is the allowance for tolerances in v out and additional margin before ovp intervention the capacitor chosen has a voltage rating of 450vdc. the overvoltage trip level of pin 3 (ovp) must be set below 450vdc. application note 2/16
power mosfet the power mosfet, q1, is used as the active switch due to its high frequency capability, ability to be driven directly from the controller and avail- ability. the main criteria for its selection include the drain to source breakdown voltage (bvdss), delivered power and temperature considerations. voltage rating: the power mosfet has to sustain the maximum boosted output dc voltage according to the follow- ing equation: bv dss >v out + d v ripple +v margin = 400 + 8 + 40 =448v the power mosfet chosen has a bv dss of 500v. power rating: the main parameters to consider are rdson and the thermal characteristics of the package and heatsink. the main losses in the power mosfet are the conduction and switching losses. the switching losses can be separated into two quan- tities, capacitive and crossover losses. the switching losses are dependent on the mosfet current di/dt. the maximum conduction (on-state) power losses can be calculated according to the following equations: i qrms max = p out h ? `` 2 v irms min ? ``````````` ` 2 16 ? `` 2 ? v irms min 3 p ? v out = = 500 M 0.9 ` ` 2 ? 88 ? ````````` 2 16 ? `` 2 ? 88 3 p ? 400 i qrms max = 5.42a p on max = i qrms 2 max ? r (ds) on max = 5.42 2 ? 0.54 = 15.86w where: i qrms max is the max. power mosfet rms current v irms min is the min. specified rms input voltage r (ds) on typ. = 0.27 w at25 cat10a,v gs = 10v r (ds) on max = 0.54 w at 100 c the capacitive switching losses at turn-on are cal- culated as follows: pcapacitive = (3.3 ? c oss ? v out 1.5 + 1 2 c ext ? v ou t 2 ) ? ? f sw =2w where: c oss = 650pf is the mosfet drain capacitance at 25v c ext = 100pf is the equivalent stray capacitance of the layout and external parts the estimated crossover switching losses (turn- on and turn-off) are calculated as follows: p crossover =v out ? i qrms ? f sw ? t cr + prec = = 400 ? 5.42 ? 80k ? 40ns + 1.5 = 8.43w where: t cr is the crossover time p rec is the boost diode recovery power loss contri- bution to reduce the turn-off losses in the mosfet, an rcd turn-off snubber has been employed. the capacitor value is calculated as follows: c11 = i q1pk ? t rise d v out = 8.92 ? 40ns 400 = 892pf therefore, use c11 = 820pf, 1000vdc rating the resistors, r23-24, must dissipate the energy stored in the snubber capacitor upon turn-on of the power mosfet. the capacitor must fully dis- charge during the switching cycle. the time con- stant of the rc combination is determined as fol- lows: r 1 10 ? 1 f sw ? c11 = 1524 the power dissipated in the resistors, r23-24, is calculated as follows: pdiss = 1 2 c11 ? v out 2 ? f sw = 1 2 ? 820pf ? 400 2 ? ? 80k = 5.25w therefore, use r23 = r24 = 510 w , 3w rating. the power mosfet chosen is the sgs-thomson part number stw20na50. this part has a bv dss = 500v, r dson = 0.27 w , and is in a to-247 package. in order to keep the junction temperature at a safe level, the mosfet is attached to an aavid heatsink part number 61085 with a thermal resistance of 3.0 c/w. this will keep the mosfet junction temperature at a safe level at worst case conditions, low-line input voltage (88v) and full load (500w). the thermal resistance of the heatsink may need to decrease depending upon the ambient temperature, type of enclosure (vented or non-vented) and the method of cooling (natural or forced convection). boost diode the main criteria for the selection of the boost di- ode, d2, include the repetitive peak reverse breakdown voltage (v rrm ), average forward cur- rent (i fave ), reverse recovery time (t rr ) and thermal considerations. application note 3/16
voltage rating: the voltage rating of the boost diode is deter- mined by the same equation as for the power mosfet. the value chosen is v rrm = 600v. current rating: the power losses in the boost diode consist of the conduction and switching losses. the switch- ing losses are a function of the reverse recovery time (trr) and output voltage (vout) . the switch- ing losses are negligible compared to the conduc- tion losses if a suitable ultra fast recovery diode is chosen. the conduction power losses can be calculated as follows: i out = p out v out = 500 400 = 1.25a i drms = p in `` 2v in rms min `````````` ` 16 ? ` ` 2 ? v in rms min 3 ? p ? v out =3.24a p cond =v to ? i out +i drms 2 ? r d = 1.15 ? 1.25 + +3.24 2 ? 0.043 = 1.89w where: v to = 1.15v is the threshold voltage of the diode r d = 0.043 w is the diode differential resistance the diode must sustain the average output cur- rent and also keep the power losses to a mini- mum in order to keep the diode junction tempera- ture within acceptable limits. the switching losses can be significantly reduced if an ultra-fast diode is employed. since this circuit operates in the continuous current mode, the mosfet has to re- cover the boost diode minority carrier charge at turn-on. thus, a diode with a small reverse recover time, t rr , must be used. this circuit employs the sgs- thomson turboswitch diode part number stta806d. this part offers the best solution for the continuous current mode operation due to its very fast reverse recovery time, 25ns typical. this part has a breakdown voltage rating (v rrm )of 600v, average forward current rating (i fave )of8a and reverse recovery time (t rr ) of 25ns. the diode is attached to the same heatsink as the power mosfet, q1. the stta806d is non-isolated thus requiring a thermal insulator with good heat transfer characteristics. the stta806di is an iso- lated package and can be attached directly to the heatsink. silicone thermal grease may be applied to improve the thermal contact between the diode and heatsink. boost inductor the boost inductor, t1, design starts with defining the minimum inductance value, l, to limit the high frequency current ripple, d i l . the next step is to define the number of turns, air gap length, ferrite core geometry, size and type for the speci- fied power level. finally, the wire size and type are determined. in the continuous mode approach, the acceptable current ripple factor, k r , can be considered be- tween 10% to 35%. for this design, the maxi- mum specified current ripple factor is 23%. the maximum current ripple occurs when the peak of the input voltage is equal to vout/2. d i lmax v out 4 ? f sw ? l = 400 4 ? 80k ? 0.5mh = 2.50a occurs at v inpk =v out/2 = 200v; v inrms = 141v d i l = v inpk ( v out - v inpk ) v out ? f sw ? l forall otherinput voltages kr = d i l 2 ? i lpk ;i lpk = `` 2 ? i lrms = ` ` 2 ? p in v inrms the minimum boost inductor value can be calcu- lated as follows: l min = v out 4 ? f sw ? d i lmax = 400 4 ? 80khz ? 2.50 = 0.5mh the table shown below relates the current ripple to the input voltage. v in (rms) v in(peak) i l(rms) i in (rms) i l(peak) current ripple k r 88 124 6.31 8.92 2.13 0.119 120 170 4.63 6.55 2.44 0.186 141 199 3.94 5.57 2.50 0.224 180 255 3.09 4.37 2.31 0.264 200 283 2.78 3.93 2.07 0.263 220 311 2.53 3.58 1.73 0.242 240 339 2.31 3.27 1.29 0.197 264 373 2.10 2.97 0.63 0.106 application note 4/16
the number of turns, n, can be calculated ac- cording to the following formula: n = l ? i lpk a eff ? b max = 0.5mh ? 8.92ma 211 ? 10 - 6 m 2 ? 0.36t = 59 turns where: l is the calculated inductance value to limit the ripple current, d i l . i lpk is the worst case inductor current occurring at low-line input voltage (88v) a eff is the effective cross-sectional area of the core b max is the maximum allowable flux density of the core the air gap is determined by referring to the mag- netic core manufacturer's al vs. air gap curves. the air gap needed for the specified inductance, turns and core type is found to be 2.8mm in the center post. to approximate the minimum core size needed for the conversion, the following equation may be used: volume k ? l[i lpk ? (i lpk + d i l )] where k is the specific energy constant that de- pends on the ratio of the gap length (l gap ) and the effective length (l eff ) of the core set and the maxi- mum d b swing. practically, k can be estimated as follows: k = 11.5 l eff l gap = 11.5 ? 114 2.8 = 468 thus, we have the following calculation for the minimum core set volume in cm 3 : volume 468 ? 0.5 ? 10 -3 [8.92 ? (8.92 + 2.5)] = 23.8 cm 3 . the core chosen for this design is an etd ge- ometry ferrite core set with the following charac- teristics: core type etd4916a effective core volume = 24.0 cm 3 . effective magnetic path length = 114 mm effective core area = 211 mm 2 ferrite material is 3c85 or equivalent np = 59t ns = 5t the etd geometry has the following advantages: 1. round center post for ease of winding 2. commercially available from philips, siemens, thomson, magnetics, etc.. 3. increased winding area 4. the center leg area is equal to the sum of the areas of the two external legs. the legs are working with the same flux density the wire size is determined by the maximum cop- per losses allowed and available winding area. for this design the wire size selected was 30awg, 30 strand litz. an auxiliary winding is used to supply power to the controller. the number of turns was deter- mined experimentally to be 5. the worst case conditions for the auxiliary winding power supply voltage are at low-line input voltage (88v) and full load (500watts) and at high-line input voltage (264v) and light-load. the auxiliary winding must supply sufficient voltage to prevent turn-off (uvlo) during normal operation and also must not supply excessive voltage causing burn-out of the controller. coilcraft part number r4849-a meets the above specifications and is available. ic biasing and control components selection the ic biasing and control component values are derived and selected in the next section. please refer to figure 2, 500 watt demoboard sche- matic. pin 1 p-gnd (power stage ground) this pin should be connected to the source of the power mosfet, q1, with a short length and wide copper trace on the printed circuit board to mini- mize the copper trace resistance and inductance. refer to figure 3, 500 watt demoboard printed circuit board layout. pin 2 ipk (overcurrent protection input) in order to obtain a very precise overcurrent pro- tection trip level, r12 and r13 are calculated as follows: i aux = v ref r13 = 5.1 5.1k = 1ma r12 = r sense ? i peak i aux = 0.033 ? 17 0.001 = 561 w use r12 = 562 ohms, r13 = 5.1k the peak current threshold is set at 17a and r sense is chosen as 0.033 ohms. pin 3 ovp (overvoltage protection input) the overvoltage protection trip level is determined by the voltage divider across the output bulk ca- pacitor, c6. the resistor values r11, r21 and r22 are calculated as follows: r21 + r22 r11 = v out +d v out v ref - 1 = 400 + 47 5.1 - 1 = 909k + 909k 21k application note 5/16
where d v out = 47v is the maximum overvoltage limit. the overvoltage limit selection is dependent upon the voltage rating of the output bulk capacitor (450vdc) and the power mosfet (500bvdss). care must be taken that the level is not set too low, thus causing false tripping of the ovp. pin 4 iac (ac current input) this pin must be connected through resistors r1 and r2 to the rectified line to drive the multiplier with a current i iac proportional to the instantane- ous line voltage as shown below: i iac ( 88v )= v inpk r1 + r2 = ` ` 2 ? 88 806k + 806k = 77 m a i iac ( 264v )= `` 2 ? 264 806k + 806k = 231 m a thus i iac ranges from 77 m a to 231 m a. the rela- tionship between i iac and multiplier output cur- rent, imult, is described in section pin 8 (mult- out). pin 5 ca-out (current amplifier output) the current amplifier output delivers its signal to the pwm comparator. an external network de- fines the suitable loop gain to process the multi- plier output and the inductor current signals. to avoid oscillation problems, the maximum inductor downslope (vout/l) must be lower than the oscil- lator ramp-slope (vsrp*fsw). the current amplifier high frequency gain can be described as follows: g ca = r15 r14 + 1 v srp ? f sw ? l v out ? r sense = 5.0 ? 80k ? 0.5m 400 ? 0.033 where: v srp = 5.0v is the oscillator ramp peak-peak volt- age g ca is the current amplifier gain f sw = 80khz is the switching frequency r sense = 0.033 w is the parallel combination of r30-32 thus, use r14=r16=2.7k, and r15=36k. to define the value of the compensation capaci- tor, c9, it is useful to consider the open loop cur- rent gain, defined by the ratio of the voltage across the sense resistor and the current ampli- fier output voltage. the crossover frequency is given by the following equation: f c = f sw 2 ? p = 80k 2 ? p = 12.7khz to ensure a good phase margin, the zero fre- quency, fz, should equal approximately f c /2. f z = f sw 4 p = 1 2 ? p ? c9 ? r15 therefore, c9 = 2 r15 ? f sw = 692pf use c9 = 680pf pin 6 lff (load feed-forward input) this pin allows the modification of the multiplier output current proportionally to the load in order to improve the load transient response time. this function is not used in this circuit and the pin is connected to vref. pin 7 vrms (voltage input) this function is very useful for universal input mains applications to compensate the gain vari- ation related to the input voltage change. this pin is connected through an external network to the rectified line input. the best control is achieved when the vrms voltage level is in the range of 1.5 to 5.5v. to avoid the rectified mains line ripple (2f), a two pole low-pass filter is realized with r3-r6 and c1- 2. the lowest pole is set near 3hz and the high- est pole near 13 hz to reduce the gain to -80db at 100 hz. v rmspin7 = ? ? ? r3 r3 + r4 + r5 + r6 ? ? ? v rmsline f pole1 = 1 ( r5 + r6 ) ? c2 = 3.66hz f pole2 = 1 r4 ? c1 = 12.6hz where: r3 = 33k w , r4 = 360k w , r5 = r6 = 620k w , c1 = c2 = 220nf at 88 vrms, vpin7 = 1.78 vrms at 264 vrms, vpin7 = 5.33 vrms gain at 2f (100hz) = -80db for single mains operation, this pin can be con- nected directly to vref (pin 11) or to ground and the rc network can be removed. if connected to ground, the vrms multiplier input is clamped at 1.5v. application note 6/16
pin 8 mult-out (output of the multiplier) this pin delivers the current imult that is used to fix the reference voltage for the current amplifier. pin 8 is connected through r14 to the negative side of the sense resistor, r30-32, to sum the (i l ? r s ) and the (i mult ? r14) signals, where i l is the in- ductor current. the sum is the error voltage sig- nal at the current amplifier non-inverting input. the multiplier output current is determined by the equation given below: i mult = 0.37 ? i ac ? ( v va - out 1.28v ) ? ( 0.8 ? v lff 1.28v ) v rms 2 = =i iac ? ( v va - out 1.28v ) v rms 2 where: v va-out = error amplifier output voltage range v lff =v ref = 5.1v if not used for load feed-forward v rms = voltage at pin 7 i iac = input current at pin 4 to optimize the multiplier biasing for each appli- cation, the relationships between imult and other input signals are reported in the designing a high power factor switching preregulator with the l4981 continuous mode application note [1], fig- ures 13a-13h. pin 9 isense (current amplifier inverting in- put) this pin is the current amplifier inverting input. it is externally connected to the network described at ca-out (pin 5). note that r14=r16=2.7k have the same value because of the high impedance feedback network. the sense resistors, r30-r32, have a combined resistance of 0.033 ohms. the low value is cho- sen to minimize the power losses since the total inductor current flows through this resistor. the value must be large enough to provide a good signal to noise ratio signal to the current amplifier. pin 10 sgnd (signal ground) this pin should be connected close to the refer- ence voltage filter capacitor (c7). refer to figure 3, 500 watt demoboard printed circuit board lay- out. pin 11 vref (voltage reference) an external capacitor filter of 1uf, c7, should be connected from pin 11 (vref) to ground. this ref- erence voltage of 5.1v is externally available and can deliver up to 10ma for external circuit needs such as the fast start-up power supply circuit as described in pin 19. pin 12 ss (soft start) this feature avoids current overload through the power mosfet during the ramp-up of the output boosted voltage. an internal switch discharges the capacitor if an output overvoltage (ovp) or a vcc undervoltage (uvlo) is detected. the volt- age at the soft-start pin acts on the output of the error amplifier and the soft start time is calculated as follows: t ss = c ss v va - out i ss = 1 m f 5.1 v 100 m a = 51 ms where: c ss =c8=1 m f v va-out = 5.1v is the typical error amplifier voltage swing i ss is the internal soft start current generator pin 13 v va-out (error amplifier output) to ensure system stability, the compensation net- work must be designed with sufficient phase mar- gin. additionally, the system must not regulate the twice mains frequency output ripple voltage in order to avoid line current distortion. the com- pensation capacitor, c10, can be calculated as follows: c 10 > 1 4 ? p ? f mains ? ( r9 + r10 ) ? g ea = k a d v out ( r9 + r10 ) where: r9 + r10 are the resistors from the output volt- age feedback resistor divider g ea is the small signal gain of the error amplifier d v out is the maximum output voltage ripple ka = 1 60 for 50 hz and 1 72 for 60 hz mains fre- quency c 10 > 1 60 ? 8 824k = 162nf, therefore use standard value 220nf the voltage open loop gain contains two poles at the origin, causing stability problems. this can be avoided by shifting the error amplifier pole from the origin to near the crossover frequency. this can be accomplished by placing a resistor, r19, in parallel with the compensation capacitor, c10. the crossover frequency is calculated as follows: application note 7/16
f c = ``````````````````````````` ? ? ? p out v out ? d v ea ? 2 p ? c out ? ? ? ? ? ? 1 2 p ? ( r9 + r10 ) ? c10 ? ? ? = = ```````````````````````` ` ? ? ? 500 400 ? 3.82 ? 2 p ? 330 m f ? ? ? ? ? ? 1 2 p ? 824k ? 220nf ? ? ? = 11.77hz r19 1 2 p ? f c ? c10 = 83.4k use r19 = 120k to increase error amplifier dc gain. pin 14 vfeed (error amplifier input) this pin is the error amplifier inverting input. this pin is connected to the resistor divider connected across the boosted output voltage to provide regulation. the boosted output voltage is speci- fied at 400vdc. the resistor divider network is calculated as follows: r9 + r10 r20 = 824k 10.6k = v out v ref - 1 = 400 5.1 - 1 use r9 = r10 = 412k pin 15 p-uvlo (programmable supply under- voltage threshold) this pin may be used to modify the turn-on and turn-off power supply thresholds. this circuit does not employ this feature and the pin is left floating. the typical turn-on threshold is 15.5v and the turn-off threshold is 10v. pin 16 sync (in/out synchronization) this function allows for synchronization in master or slave mode with other circuits in the system. this demoboard does not use this function and the pin is left floating. pin 17 rosc (oscillator resistor) pin 18 cosc (oscillator capacitor) these pins determine the oscillator frequency of the circuit. a resistor, r17, is connected from pin 17 to ground. a capacitor, c4, is connected from pin 18 to ground. the operating frequency is cal- culated as follows: f sw = 2.44 r osc ? c osc = 2.44 30.1k ? 1n = 80khz approx. pin 19 vcc (supply voltage input) the ic must be supplied with a very low current, 0.3ma typical, during start-up. the turn-on threshold is 15.5v typical with 5.5 volts typical of hysteresis. the start-up current is provided by the resistor/capacitor network driven off the recti- fied line voltage. a fast start-up circuit is em- ployed to quickly turn on the ic and reduce power consumption in the start-up resistor, r28. the capacitor, c12, has a value of 220uf to ensure sufficient hold-up time to allow the auxiliary wind- ing to provide voltage after initial start-up. the fast start-up is realized with q2, q3, r25, r26, r27, r28, d5 and c12. the fast start-up circuit is turned-off when the controller turn-on threshold is reached and vref forward biases q2, pulling the gate of q3 to ground. the auxiliary winding on the main boost inductor provides the normal operating voltage for the con- troller. the voltage induced on this winding is rectified by diodes d7-d10. resistor r29 pro- vides current limiting and zener d6 regulates the supply voltage to 18 volts. pin 20 gdrv (gate driver output) the output of this pin is internally clamped at 15v to prevent breakdown of the power mosfet gate oxide. a resistor, r18, of 15 w is placed in series with the gate of the power mosfet to avoid over- shoot and limit the di/dt of the switch. a 1n4148 diode, d3, is connected to the gate to provide fast turn-off of the power mosfet. evaluation results the 500w demoboard has been evaluated for the following parameters: pf (power factor), % thd (percent total harmonic distortion), h3..h7 (per- centage of current's nth harmonic amplitude), vout (output voltage) and efficiency (n). the test configuration and test results are shown below: test set-up and equipment table 1: 500w demoboard evaluation results v in fp i pf thd h3 h5 h7 v out p o h (v rms ) (hz) (w) (%) (%) (%) (%) (v) (w) (%) 88 60 560 99.9 2.9 1.3 1.7 1.2 402 490 87.5 110 60 543 99.9 2.8 1.4 1.8 1.3 403 492 90.6 220 50 525 99.8 3.3 1 2.4 1.1 406 499 95.1 270 50 523 99.8 3.4 1 2.6 1.1 408 504 96.3 ac power source larcet 3kw pm1200 ac power analyser emi filter pfc l4981 demo load application note 8/16
emi/rfi filter the harmonic content measurement was made with the emi/rfi filter interposed between the ac source and the demoboard under test, while the efficiency has been calculated without the filter contribution. c1 d94in052 t1 t2 c line pfc earth figure 1: emi/rfi test filter part list of the figure 2 . part des. description vendor's part # fuse f1 fuse, 3ag fast acting 10a, 250vac digi-key #f127-nd fuse clip 3ag fuse clips digi-key #f048-nd c1 met. poly. film cap., 0.22 m f, 100v panasonic ecq-e1224kf digi-key #ef1224 c2 met. poly. film cap., 0.22 m f, 100v panasonic ecq-e1224kf digi-key #ef1224 c3 met. poly. film, .68uf, 250vac, panasonic ecqu2a684mv digi-key #p4615-nd c4 polyester cap., .001 m f, 50v, panasonic ecq-b1h102jf digi-key #p4551-nd c5 polyester cap., .012 m f, 50v panasonic ecq-b1h123jf digi-key #p4583-nd c6 alum. electrolytic cap., 330 m f, 450vdc, 85 deg. c digi-key#p6443-nd c7 electrolytic cap., 1.0 m f, 63v, panasonic ece-a1ju010,85deg c digi-key #p6275-nd c8 electrolytic cap., 1.0 m f, 63v, panasonic ece-a1ju010,85deg c digi-key #p6275-nd c9 polyester cap. 680pfd., 50v, panasonic ecq-b1h681jf digi-key # p4580-nd c10 met. poly. film cap., 0.22 m f, 100v panasonic ecq-e1224kf digi-key #ef1224 c11 ceramic capacitor, 820pfd.,1000vdc digi-key #p4127-nd c12 electrolytic cap., 220 m f, 25v,panasonic ece-a1eu101,85deg c digi-key #p6240-nd d1 diode bridge, 600v, 25a digi-key #mb256-nd d2 stta806d/di,, 600v, 8a, isolated to220ac package sgs-thomson stta806d/di d3 switching diode, 1n4148, 100v digi-key #1n4148ct-nd d4 fast recovery diode, sttb406, 600v, 4a sgs-thomson sttb406 d5 zener diode, 22v, 1/2w, do-35 package digi-key #1n5251bct-nd d6 zener diode, 18v, 1/2w, do-35package digi-key #1n5248bct-nd d7 fast recovery rectifier diode, 100v, 1.5a sgs-thomson byw-100-100 d8 fast recovery rectifier diode, 100v, 1.5a sgs-thomson byw-100-100 d9 fast recovery rectifier diode, 100v, 1.5a sgs-thomson byw-100-100 d10 fast recovery rectifier diode, 100v, 1.5a sgs-thomson byw-100-100 r1 metal film res., 806k, 1/4w, 1% digi-key #806kxbk-nd r2 metal film res., 806k, 1/4w, 1% digi-key #806kxbk-nd r3 carbon film res., 33k, 1/4w, 5% digi-key #33kqbk-nd application note 9/16
part des. description vendor's part # r4 carbon film res., 360k, 1/4w, 5% digi-key #360kqbk-nd r5 carbon film res., 620k, 1/4w, 5% digi-key #620kqbk-nd r6 carbon film res., 620k, 1/4w, 5% digi-key #620kqbk-nd r9 metal film res., 412k, 1/4w, 1% digi-key #412kxbk-nd r10 metal film res., 412k, 1/4w, 1% digi-key #412kxbk-nd r11 metal film res., 21k, 1/4w, 1% digi-key #21.0kxbk-nd r12 metal film res., 562, 1/4w, 1% digi-key #562xbk-nd r13 metal film res., 5.11k, 1/4w, 1% digi-key #5.11kxbk-nd r14 carbon film res., 2.7k, 1/4w, 5% digi-key #2.7kqbk-nd r15 carbon film res., 36k, 1/4w, 5% digi-key #36kqbk-nd r16 carbon film res., 2.7k, 1/4w, 5% digi-key #2.7kqbk-nd r17 metal film res., 30.1k, 1/4w, 1% digi-key #30.1kxbk-nd r18 carbon film res., 15 ohms, 1/4w, 5% digi-key #15qbk-nd r19 carbon film res., 120k, 1/4w, 5% digi-key #120kqbk-nd r20 metal film res., 10.7k, 1/4w, 1% digi-key # 10.7kxbk-nd r21 metal film res., 909k, 1/4w, 1% digi-key #909kxbk-nd r22 metal film res., 909k, 1/4w, 1% digi-key #909kxbk-nd r23 metal oxide resistor, 510 ohms, 3 watts, 5% digi-key#p510w-3bk-nd r24 metal oxide resistor, 510 ohms, 3 watts, 5% digi-key#p510w-3bk-nd r25 carbon film resistor, 10k, 1/4w, 5% digi-key #10kqbk-nd r26 carbon film resistor, 1.1m, 1/4w, 5% digi-key #1.1mqbk-nd r27 carbon film resistor, 1.1m, 1/4w, 5% digi-key #1.1mqbk-nd r28 carbon film res., 10k, 1/2w, 5% digi-key #10kh-nd r29 carbon film resistor, 33 ohms, 1/2w, 5% digi-key #33h-nd r30 3 watt, non-inductive 0.1 ohms, type lo-3-.010 newark #96f3616 r31 3 watt, non-inductive 0.1 ohms, type lo-3-.010 newark #96f3616 r32 3 watt, non-inductive 0.1 ohms, type lo-3-.010 newark #96f3616 ntc 1 20 ga (0.8mm) jumper wire 22 ga jumper ntc 2 20 ga. (0.8mm) jumper wire 22 ga jumper heatsink 1 aavid type 61085, 1.5deg c/w/3in., 1.5o length aavid #61085 heatsink 2 bridge diode attachable heatsink datogliere pcb 1 fr-4 material cals 95 001_a t1 coilcraft part# r4849-a 0.5mh coilcraft 'part # r4849-a standoffs aluminum hex standoff 0.375o, 4-40 thread newark#89f1949 q1 stw20na50, 500v, 20a, 2.7 ohms to-247 sgs-thomson stw20na50 q2 npn transistor high speed, 30v, .8a, to-18 package sgs-thomson 2n2222 q3 n-channel mosfet, stk2n50, 500v, 2a, sot-82 sgs-thomson stk2n50 j1 3 pole, 15a, terminal block newark #93f7182 j2 3 pole, 15a, terminal block newark #93f7182 u1 l4981a, pfc ic sgs-thomson l4981a ic socket 20 pin dip socket, gold pin and clip digi-key #ed56203-nd misc. mounting screws, nuts, insulators part list of the figure 2 (continued) application note 10/16
r6 620k 5% 16 d1 bridge u1 l4981a r28 10k 1/4w 19 t1 14 3 r18 15 w 5% r19 120k 5% 20 r14 2.7k 5% r15 36k 5% c9 0.68nf 50v r16 2.7k 5% c3 0.68 m f 250vac r17 30.1k 1% c8 1 m f 63v r20 10.7k 1% r11 21k 1% r9 412k 1% r21 909k 1% 12 17 10 18 9 5 8 f1 10a vout d95in258b - q1 stw20na50 r30 0.1 w 3w + - + - byw100-100 c12 220 m f 25v d6 18v 1/4w 7 6 13 r13 5.11k 1% d2 stta806di c11 820pf 1000v c5 12nf 50v d8 d10 d9 d7 ntc2 + ntc1 + r1 806k 1% r2 806k 1% 4 iac 2 r12 562 1% vi (88 to 264v) ipk c1 220nf 100v r3 33k 5% r4 360k 5% r5 620k 5% c2 220nf 100v r25 10k 5% r27 1.1m 5% r26 1.1m 5% q2 2n2222 d5 22v 1/4w r7 r8 15 vrms s/fm r29 33 1/4w d3 1n4148 gdrv mout ovp c4 1nf 50v caout isense cosc rosc ssc c7 1 m f 63v 11 vref 1 lff sgnd pgnd r10 412k 1% r22 909k 1% c10 220nf 100v vaout vfeed r23 510 w 3w d4 sttb-406 r24 510 w 3w c6 330 m f 450v r31 0.1 w 3w r32 0.1 w 3w puvlo vcc q3 stk2n50 figure 2: 500w demoboard schematic application note 11/16
figure 3: 500w demoboard printed circuit board layout application note 12/16
an application program named designing pfc [3] is available for the designer. this program al- lows the designer to make changes to the in- put/output design specifications and calculates and selects the component values and types. for example, this program can easily convert this de- sign to single mains operation (120 or 240 volts). the results are presented in two screens, the schematic and parts list, and may be sent to a printer for a hardcopy for future reference. two solutions at 110vac (fig. 4) and 220vac (fig. 5) are shown below. 16 d1 bridge u1 l4981a r28 10k 2w 19 t1 14 3 r18 15 w 5% r19 220k 5% 20 r14 6.2k 5% r15 47k 5% c9 0.47nf 50v r16 6.2k 5% c3 470nf 250vac r17 24k 1% c8 1 m f 63v r20 15k 1% r11 15k 1% r9 330k 1% r21 360k 1% 12 17 10 18 9 5 8 f1 10a vout=230v d95in284c - q1 stp9n30 r30 120m w 2w + - + - byw100-100 c12 220 m f 25v d6 18v 1/4w 7 6 13 r13 5.11k 1% d2 byt08p-400 c11 330pf 250v c5 12nf 50v d8 d10 d9 d7 ntc2 + ntc1 + r1 200k 1% r2 200k 1% 4 iac 2 r12 360 1% vi (88 to 132v) ipk r25 10k 5% r27 1.1m 5% r26 1.1m 5% q2 2n2222 d5 22v 1/4w r7 r8 15 vrms s/fm r29 33 1/4w d3 1n4148 gdrv mout ovp c4 1.2nf 60v caout isense cosc rosc ssc c7 1 m f 63v 11 vref 1 lff sgnd pgnd r10 330k 1% r22 360k 1% c10 120nf 100v vaout vfeed r23 680 w 2w d4 sttb-406 r24 680 w 2w c6 680 m f 315v puvlo vcc r31 120m w 2w r32 120m w 2w q3 stk2n50 trasformer t1: core: etd 39 x 20 x 13 / gap 1.8mm. primary inductance =0.25mh 44 turns 15 x awg29. secondary = 5 turns figure 4: 400w/230v; v in =110v 20%. application note 13/16
16 d1 bridge u1 l4981a r28 10k 4w 19 t1 14 3 r18 15 w 5% r19 130k 5% 20 r14 7.5k 5% r15 36k 5% c9 0.47nf 50v r16 7.5k 5% c3 220nf 250vac r17 24k 1% c8 1 m f 63v r20 10.7k 1% r11 21k 1% r9 412k 1% r21 909k 1% 12 17 10 18 9 5 8 f1 10a vout=400v d95in283c - q1 sth14n50/fi r30 120m w 2w + - + - byw100-100 c12 220 m f 25v d6 22v 1/4w 7 6 13 r13 5.11k 1% d2 stta806di c11 820pf 1000v c5 12nf 50v d8 d10 d9 d7 ntc2 + ntc1 + r1 510k 1% r2 510k 1% 4 iac 2 r12 390 1% vi (176 to 264v) ipk r25 10k 5% r27 1.1m 5% r26 1.1m 5% q2 2n2222 d5 22v 1/4w r7 r8 15 vrms s/fm r29 33 1/4w d3 1n4148 gdrv mout ovp c4 1.2nf 60v caout isense cosc rosc ssc c7 1 m f 63v 11 vref 1 lff sgnd pgnd r10 412k 1% r22 909k 1% c10 220nf 100v vaout vfeed r23 510 w 3w d4 sttb-406 r24 510 w 3w c6 470 m f 450v puvlo vcc r31 120m w 2w r32 120m w 2w q3 stk2n50 trasformer t1: core: etd 44 x 22 x 14 / gap =2mm. primary inductance =0.43mh 53 turns 10 x 0.36mm secondary = 5 turns figure 5: 800w/400v; v in = 220v 20%. application note 14/16
references [1] g. comandatore and u. moriconi, application note 628 designing a high power factor switch- ing preregulator with the l4981 continuous mode, sgs-thomson microelectronics, inc., may, 1994. [2] datasheet power factor corrector, sgs- thomson microelectronics, inc., may, 1994. [3] designing pfc application program, sgs- thomson microelectronics, inc., april, 1995. application note 15/16
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs- thomson microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of sgs-thomson microelectronics. ? 1997 sgs-thomson microelectronics printed in italy all rights reserved sgs-thomson microelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. application note 16/16

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